The integrated circuit industry is constantly trying to improve the performance, increase the reliability and reduce the cost and complexity of all semiconductor products. The development of epitaxial growth and most importantly, silicon epitaxial growth and selective epitaxial growth (SEG), was a result of the ongoing research to further the industry-wide goals of making these improvements. Epitaxy, when interpreted literally, is defined as "arranged upon", and in a more relevant manner is defined as "the growth on a crystalline substrate of a crystalline substance that mimics the orientation of the substrate."
The main impetus for developing epitaxial capability was to improve the performance of silicon bipolar transistors and the performance of bipolar integrated circuits in general. Therefore, epitaxial growth of a film or layer of material was used in early stages of development for the optimization of bipolar breakdown voltages between a collector and a substrate junction, while still maintaining a relatively low collector resistance. As the industry developed complementary metal oxide semiconductor (CMOS) devices, the uses for epitaxial growth extended to several other applications, some of which are: (1) isolation improvements; (2) the reduction in the well-known and understood latch-up phenomena; (3) radiation hardening of circuits; (4) the development of numerous silicon on insulator (SOI) technologies; (5) the development of three dimensional silicon structures; and (6) extended source and drain technology. The use of epitaxial growth has several unique advantages, some of which are: (1) greater layout and circuit flexibility; (2) more controllable device doping; (3) the ability to form buried layers of material; (4) the ability to form very sharp junctions, where sharp junctions are defined to be two regions of opposite conductivity type, referred to as a first conductivity and a second conductivity, separated by a thin transistion region wherein the conductivity in the transistion region transistions from the first conductivity to the second conductivity in a very abrupt manner and (5) reduction in oxygen, carbon, particulate, organic, heavy metal, sodium, and inorganic device impurities. Because of these mentioned applications and advantages it is easy to see the commercial value of epitaxial growth not only to silicon bipolar and silicon CMOS technology, but to other technologies such as bi-CMOS, which is the combination of bipolar and CMOS, and other technologies that could involve substrate materials or compounds other than silicon, such as germanium (Ge) or gallium-arsenide (GaAs).
Due to a large commercial market and the many uses of epitaxial growth, the process of growing epitaxial material is important. A known and widely used method of growing epitaxial silicon requires a high temperature hydrogen pre-bake of the substrate material to remove native oxide and contaminants from the substrate surface before initiating epitaxial growth. A 950.degree. C. to 1000.degree. C., or above, pre-bake was considered necessary to allow for good quality epitaxial growth. Quality epitaxial growth can be defined, in a very general way, as being a grown material exhibiting as few crystalline defects as possible, while in the same manner providing uniform coverage over the growth area. Epitaxial growth quality is usually determined by the quality of the substrate material due to the fact that the epitaxial growth is not usually more defect free than the substrate it is grown upon.
Although a hydrogen pre-bake produces a quality epitaxy as previously described, this pre-bake step has several disadvantages: (1) hydrogen enhanced boron penetration from conventional and widely used p+ conductivity type gates through surrounding oxides causes transistor threshold voltage (Vt) shifts and unwanted charge to transfer from doped areas to surrounding areas; (2) hydrogen is known for a phenomena called interface state density (D.sub.it) generation wherein hydrogen at these temperatures severely attacks silicon dioxide (SiO.sub.2) and creates defects that usually result in well known and documented device-degrading charge trap formation; (3) oxide undercutting has been observed where this high temperature pre-bake leads to severe etching and physical removal of exposed oxides; (4) higher temperatures in most integrated circuit equipment introduce more impurities into wafers; and (5) the breakdown voltage and charge breakdown resistance of transistor gate dielectrics, which are needed to be large for long lifetime and operational safety margins on most devices, are usually degraded. It is also known that any high temperature process suffers from known disadvantages, such as: (1) outward diffusion of device electrical junctions, such as a CMOS source and drain and/or a bipolar collector, emitter and base; (2) reduced electrical isolation; (3) mechanical wafer stress and strain, (4) known wafer warpage and wafer slip phenomena; (5) increased amounts of crystalline defects; and (6) autodoping, where impurities evaporate from one exposed section of a wafer and deposit onto another section of a wafer electrically doping the other section in an undesired manner.
Another method for epitaxial growth of a film or layer of material involves a widely used manufacturing technique known as "rapid thermal processing", (RTP). Rapid thermal processing is a method by which substrate wafers are instantaneously heated to a predetermined temperature and kept in that temperature for very short time durations. After this brief time duration the substrate wafers are cooled to near room temperature. Rapid thermal processing techniques are used in many integrated circuit processes and although they have advantages, such as reducing dopant transfer and impurity outdiffusion, these processes still have several of the disadvantages listed previously. The most unwanted disadvantage for epitaxial growth being the rapid incorporation of impurities such as oxygen, carbon, particulate, organic, heavy metal, sodium, and inorganics into all exposed portions of the wafer including the substrate surface on which epitaxial growth is to take place.
In general, the industry has developed several techniques in which epitaxial growth is possible. The majority of these techniques involve high temperature processing or a low temperature process that results in contaminated or defect laden epitaxial material.